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Adding On-Chip Passive Components

Authors: Michael Cunningham, Ji Hoon Hyun, and Dr. Dong S. Ha


Starting Cadence

1.  Start Cadence Virtuoso under the folder with cds.lib linked to TSMC library, i.e., run “cdsprj” to change to folder, then run “Cadence” and “icfb &”.

Start_Cacence_Virtuoso_2
Figure 1. Start Cadence Virtuoso

 

Editing the Schematic for Layout

1.  Open the new schematic cell view. You should see the schematic you've already created.

LP-Figure05
Figure 5. Adjusted schematic (no pins)

 2.  Now, we will adjust this circuit as shown in the figure above. The full table of all components has also been provided (make sure each of the values match up). If you need to edit an instance after placement, select the device and use the bindkey "q" to edit the object properties. Delete all unused components/net names.

As a refresher, the figure below shows the "Add Instance" form (press "i" to add an instance).

LP-Figure04
Figure 4. Add an inductor from the tsmcN65 library

 

Component Description Instance Library Instance Cell Parameters
gnd ground analogLib gnd -
R0 P+ poly resistor tsmcN65 rrpoly r = 10
M0 nmos tsmcN65 nmos_rf

wr = 4u (width)

lr = 240n (length)

nr = 16 (# of fingers)

m = 1 (multiplier)

C0 capacitor tsmcN65 mimcap c = 10p
L0 inductor tsmcN65 spiral_std_mu_z Add the default, we will change the value in the next step.

 

3.  We must add pins to this circuit. To add a pin press "p" or select the pin button on the side bar.

4.  In the "Add Pin" box, type "vi vd" with an input direction and No attached net expression.

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LP-Figure06
Figure 6. Add input pins

5.  Place these pins at the appropriate locations. Repeat this procedure for the output pin ("vo" with an "output" direction and No attached net expression). Your schematic should look like the one below.

LP-Figure07
Figure 7. The full schematic

(Remember, you can renumber instances with Design → Renumber Instances... - I have selected X+Y+ sequencing with a 0 starting index.)

6.  Now, we want to adjust the inductor value to 2.53nH for 1GHz resonance with the 10pF capacitor (ωo = 1/√LC). In order to do this we must adjust multiple parameters. Select the inductor and press "q".

7.  In the object properties editor, select the "Finder" application.

LP-Figure08
Figure 8. Finder

8.  Enter a working frequency of "1" (GHz) and an L value of "2.53" (nH). Leave everything else as the default. Select FIND.

LP-Figure09
Figure 9. Find inductance

9.  It may take a little bit of time, but when the results are displayed, you will get a window like the one below.

LP-Figure10
Figure 10. Possible inductor designs

10.  Select the L(nH) column to arrange the devices and select the one closest to 2.53nH. Highlight this one (device 14 for me) and select send to CDF. Close the application. I have provided the details of the inductor if you wish to enter them manually in the editor.

LP-Figure11
Figure 11. Select design

LP-Figure12
Figure 12. Finder results

11.  Once the inductor values are chosen, select OK to return to the schematic. You may need to redraw/resize the display ("F6"/"f") and you will want to check and save ("Shift + x").

LP-Figure13
Figure 13. Completed schematic

FUN FACT: It is often customary to include "dummy" resistances and transistors in the pin schematic when good matching between multiple devices is required. The reason this is done has to do with fabrication - components on the edges typically receive the majority of process variation. For this reason, the dummies are inserted on the sides of the devices and are shorted (so they play no role in the design) and are tied to ground or the rail voltage. Dummy transistors can also be inserted within a long train of interdigitate transistors to create a buffer between two FETs with different drain/source voltages. This will often cause the dummy FET to have different S/D voltages, so the gate must be biased for cutoff.



Comments to: ha@vt.edu