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Pad Insertion

 Author:  Jeannette Djigbenou


Once your synthesized design has passed physical verification and power estimation, you can insert pads to the design for fabrication. Pads usually are depending on the fab that you will be sending your information to. In this tutorial, we are sending the design to Mosis. This tutorial describes how to insert pads to a design.

One way to insert pads would consist of modifying the synthesized verilog file by inserting the pad cells and re-running place-and-route with the dummy cells of the pads. These dummy cells are DRC clean, so your place and route design should be DRC clean. In this tutorial, we are using TSMC 0.25 pads available through MOSIS. If you are using another technology, please contact MOSIS to obtain the I/O pads for the corresponding technology.

1.  Modify the verilog synthesized design by inserting pads as shown in file syn_top_count_pads.v

2.  Run place-and-route on this synthesized design and get the GDS file from SOC encounter: TOP_COUNT.gds

3.  Import the GDS synthesized design to Cadence. Refer to previous tutorial if needed.

4.  Run DRC on the design that includes dummy pads. Correct the design for any DRC errors. It should be DRC clean. The design should look as such:

Pad Insertion

5.  Download the pads into the directory in which you run Cadence. In this case, we download the GDS file from: http://www.mosis.com/design/flows/design-flow-scmos-kits.html.

6.  Import the GDS file of the pads (file  mTSMd025P.gds) in your run directory by going to the CIW -> File->Import->Stream… and updating the Stream In form as follow:

a.  Run Directory: .
This is the current directory

b.  Input File: mTSMd025P.gds
The GDS file of the actual pads from Mosis

c.  Top Cell Name: Leave this field blank.

d.  Library Name: Mosis_TSMC250
The library in which you want to import the pads cells.

7.  Select User-Defined Data: Fill it as shown below:

a.  Layer Map Table: vtvt_tsmc250_StreamIn.map. This file converts the layers in the gds file into valid MOSIS layers. However, it contains extra layer numbers that are not compatible with MOSIS. For designs to be manufactured, use vtvt_tsmc250_nolabel.map in the Layer Map Table option.

8.  Select Options: Fill it as shown below.

pad_insertion_2

9.  The library Mosis_TSMC250 is created. You can view its content in Library Manager.

10.  Replace the dummy pads by their actual layout cells by editing the name and library as shown below for replacing cell “padinc” from library vtvt_tsmc250_dummymosispad by cell PadInC from library Mosis_TSMC250. Make sure that you do not modify the orientation of the cell.

pad_insertion_3

11.  The final design is ready for submission. It is shown below

pad_insertion_4

12.  Now, you can submit the design to MOSIS. Follow the next tutorial for more details.

  • When you save gds file, please use vtvt_tsmc250_StreamIn.map file as your Layer Map Table
  • You can find the way how to save GDS from this tutorial: Chip Submission


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