Exploring Approximate Storage for Data-Intensive Compute-in-Memory Accelerators

Speaker:  Brian Worek

Host: MICS

Date: October 6 (Friday), 2017
Time: 2:30 PM - 3:30 PM
Location: Whittemore 654 (6th Floor Conference Room)

Abstract:

For my thesis, I propose approximate storage methods to improve the efficiency of compute-in-memory accelerators for data-intensive applications. My work will culminate in a collection of innovative algorithms and implementations that improve power and performance by several orders of magnitude over existing von Neumann architectures. In this talk, I’ll review on-going efforts in both approximate storage and compute-in-memory. I’ll then suggest some preliminary approaches to efficiently apply approximate storage to compute-in-memory. Driven by user demand for more compute and storage capabilities in their IoT devices, smartphones, and other portable gadgets, today’s computing ecosystem is overwhelmed with massive data-intensive applications. As we near the end of conventional Moore scaling, novel solutions are needed to continue improving compute and storage efficiency of these dataintensive applications. Compute-in-memory and approximate storage present significant opportunities to address these challenges, through bypassing the traditional von Neumann bottleneck in placing compute logic in memory. Performing compute operations in memory improves system bandwidth and energy by eliminating long on/off-chip interconnects to transport data. Approximate storage improves power and performance by leveraging the intrinsic error resilience of data-intensive applications and trading off accuracy in select partitions of memory for non-critical data.

Bio:

Brian Worek is a first year M.S. student in Computer Engineering at Virginia Tech and a recipient of the ECE department’s Bradley Fellowship. Brian's research interests span high-performance heterogeneous VLSI systems-on-chip (SoCs), networks-on-chip (NoCs), approximate computing and storage, and compute-in-memory non-von Neumann architectures. Brian earned the B.S. in Computer Engineering (focus on digital design) from Virginia Tech. As an undergraduate, he served as President of the HKN Beta Lambda chapter. Last Summer he worked as an intern in Qualcomm’s SoC performance validation group in San Diego as a digital hardware engineer. Outside of school, Brian loves weightlifting, traveling, listening to music, beer-tasting, and playing with his cat named Cal.