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Year 2009

• J-S. Lee, and D.S. Ha, "FleXilicon Architecture and Its VLSI Implementation,"IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 17, No. 8, pp. 1021-1033, August 2009.

Year 2007

• J. Djigbenou, and D.S. Ha, "Development and Distribution of TSMC 0.25 um Standard CMOS Library Cells," International Conference on Microelectronic Systems Education, pp. 27-28, June 2007.
• J-S. Lee, and D.S. Ha, “High Speed 1-bit Bypass Adder Design for Low Precision Additions,” International Symposium on Circuits and Systems, pp. 1093-1096,May 2007.
• J. Djigbenou, T.V. Nguyen, C.W. Ren, and D.S. Ha, “Development of TSMC 0.25um Standard Cell Library,” IEEE Southeast Conference, pp. 566-568, March 2007.

Year 2006

• J-S. Lee, and D.S. Ha, "FleXilicon: a Reconfigurable Architecture for Multimedia and Wireless Communications," International Symposium on Circuits and Systems, pp. 4375-4378, May 2006

Year 2005

• R.C. Palat, J. Kim, J.S. Lee, D.S. Ha, C. Patterson, and J.H. Reed, “Reconfigurable Modem Architecture for CDMA Based 3G Handsets,” 2005 Software Defined Radio Technical Conference and Product Exposition, Session 1.4-01 (7 pages), November, 2005.
• J. Kim, D.S. Ha, and J.H. Reed, “A New Reconfigurable Modem Architecture for 3G Multi-Standard Wireless Communication Systems,” International Symposium on Circuits and Systems, pp. 1051–1054, May 2005.

Year 2004

• N.J. August and D.S. Ha, “Low Power Design of DCT and IDCT for Low Bit Rate Video Codecs,” IEEE Transactions on Multimedia, Vol. 6, No. 3, pp. 414-422, June 2004.
• V. Srinivasan, D.S. Ha, and J.B. Sulistyo, "Gigahertz-Range MCML Multiplier Architectures," International Symposium on Circuits and Systems, Volume II, pp. 785-788, May 2004.

Year 2003

• J.B. Sulistyo and D.S. Ha, "5 GHz Pipelined Multiplier and Mac in 0.18 um Complementary Static CMOS," International Symposium on Circuits and Systems, pp. 117-120, May 2003.
• H-J. Lee and D.S. Ha, "An Area and Power Efficient Rake Receiver Architecture for DSSS Systems," IEEE International SOC Conference, pp.103-106, September 2003.

Year 2002

• J.B. Sulistyo and D.S. Ha, "HyPipe: A New Approach for High Speed Circuit Design," IEEE International ASIC/SOC Conference, pp. 203-207, September 2002.
• H-J. Lee and D.S. Ha, "A New Low-Power and Area Efficient Rake Receiver Design Without Incurring Performance Degradation," IEEE International ASIC/SOC Conference, pp. 251-255, September 2002.

Year 2001

• N. August and D.S. Ha, "On the Low-Power Design of DCT and IDCT for Low Bit Rate Video Codecs," IEEE International ASIC/SOC Conference, pp. 203-207, September 2001.
• S. Richmond and D.S. Ha, "A Low-Power Motion Estimation Block for Low Bit-Rate Wireless Video," International Symposium on Low Power Electronics and Design, pp. 60-63, August 2001.