CAD/modeling
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Year 2010
- M. Lehne and S. Raman, “A Discrete-Time FFT Processor for Ultra-Wideband OFDM Wireless Transceivers: Architecture and Behavioral Modeling,” in IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 57, no. 11, pp, no. 11, pp. 3011-3022, Nov. 2010.
Year 2008
- J. Kim, B. L. Grisso, J.K. Kim, D.S. Ha, and D.J. Inman, "Electrical Modeling of Piezoelectric Ceramics for Analysis and Evaluation of Sensory Systems,” Sensors Applications Symposium, pp. 122- 127, February 2008.
Year 2007
- I. Chamas and S. Raman, “A Comprehensive Analysis of Quadrature Signal Synthesis in Cross-Coupled RF VCOs,” IEEE Transactions on Circuits and Systems-I, vol. 54, no. 4, pp. 689-704, April 2007.
Year 2006
- I. Chamas and S. Raman, “Effect of Device Mismatch on the Phase and Amplitude Accuracy in LC Quadrature VCOs,” 2006 IEEE Radio and Wireless Symp., San Diego, CA, Jan. 17–20, 2006, pp. 439- 442. (2nd place award, student paper competition)
Year 2004
- R. Svitek, M. Clifford, and S. Raman, “Development of Scalable Models for Patterned-Ground-Shield Inductors in SiGe BiCMOS Technology,” 2004 IEEE Topical Workshop on Si Monolithic Circuits in RF Systems Digest, Atlanta, GA, Sep. 8–10, 2004.
- C. Maxey and S. Raman, “Finite Element-Based Analysis of Single-Crystal Si Contour-Mode Electromechanical RF Resonators,” Proc. of the 2004 Intl. Conference on MEMS, NANO and Smart Systems (ICMENS 2004), Banff, Alberta, Canada, 25-27 August 2004.
Year 2005
- S. Yardi, K. Channakeshava, M.S Hsiao, T. Martin, D.S. Ha, “A Formal Framework for Modeling and Analysis of System-Level Dynamic Power Management,” International Conference on Computer Design, pp. 119-126, October 2005.
- S.M. Yardi, M.S. Hsiao, T.L. Martin, and D.S. Ha “Quality-Driven Proactive Computation Elimination for Power-Aware Multimedia Processing,” Proceedings on Design Automation and Test in Europe (DATE), pp. 340-345, March, 2005.
Year 2003
- D.I. Sanderson, J.C. Rautio, R.A. Groves, and S. Raman, “Accurate Modeling of Monolithic Inductors Using Conformal Meshing for Reduced Computation Times,” IEEE Microwave Magazine, vol. 4, no. 4, pp. 87–96, Dec. 2003.
- R.L. Bunch and S. Raman, “Large-Signal Analysis of MOS Varactors in CMOS –GM LC VCOs,” IEEE J. of Solid State Circuits, vol. 38, no. 8, pp. 1325–1332, Aug. 2003.
Year 2002
- J.B. Sulistyo and D.S. Ha, "New Characterization Method for Delay and Power Dissipation of Standard Library Cells," Journal of VLSI Design, Vol.15, No. 3, pp. 667-678, November 2002.