/*
** Test bench for 32-bit updown counter
** Modified for Synopsys tool - backward SAIF file generation
** Author: Jinsik Yun(yun@vt.edu)
**         Hetaswi Vankani (hetaswi@vt.edu)
** Last Modified : October 25, 2013
*/

`timescale 1ns/1ps

module tb_cnt_updown();
        reg     [1:0]   up_down;
        reg             clk, reset;
        wire    [31:0]  count;

        updown_counter M1(count, up_down, clk, reset);

        initial begin
                #150 $finish;
        end

        always begin
                #5 clk = ~clk;
		end

        initial begin
                // Section added to original testbench
                $dumpfile ("./updown_counter.dump");
                $dumpvars (0, tb_cnt_updown);
                
                // Original testbench
                up_down = 2'b00; clk=0; reset=1;
                #10 reset = 0;
                #10 up_down = 2'b01;
                #60 up_down = 2'b10;
                #30 up_down = 2'b11;
                #10 reset = 1;

                end
endmodule